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MULTI-CORE ARCHITECTURAL DECOMPOSITION METHODS FOR LOW-POWER SYMMETRIC AND ASYMMETRIC MULTI-PROCESSING

27 March 2012 /Mark Benson

Presentation at Design West (was Embedded Systems Conference (ESC), by Mark Benson.

ABSTRACT: Thanks to the laws of physics and the practical limits on rates of thermal heat dissipation, CPU clock cycles in integrated circuits are no longer increasing year-over-year at the same rate that memory densities are.

For this reason, we have seen a proliferation of multi-core CPUs for commercial desktop PCs, and are now beginning to see this trend impact embedded systems as well.

This presentation explains intersecting variables of performance, power, and complexity, and how these variables change dynamically in a multi-core embedded environment.

The primary focus of this presentation is to delineate tools and techniques for managing homogeneous and heterogeneous embedded cores through intelligent architectural decomposition, particularly when low-power design is a primary constraint.